Design Engineer @

4 hours ago


Budapest, Budapest, Hungary Hays Hungary Full time

With offices around the world, we are a diverse community of dedicated and innovative engineers. By enabling an inclusive, meritocratic, and open workplace where all our people can grow and succeed, we support our people to share their unique contributions to our success in the global marketplace.

The System IP team has a track record of numerous successful deliveries. We have an open and relaxed culture where best-in-class, creative engineers work together on significant projects. Our upbeat and collaborative team builds System IP components used in future infrastructure, client, embedded, and IoT devices.

At our Budapest-based design center, you will join a hardworking team. You will contribute to the verification planning, verification implementation, coverage closure, benchmarking, and modeling of high-performance, energy-efficient, and secure IP components.

You will use novel technologies and methodologies to ensure the highest quality products as you collaborate with other engineering teams to build complete IP solutions to address the performance, power, and cost requirements for almost all application markets. Join us and let's invent the future together

Preferred Qualifications:

  • Master's degree in Electrical Engineering or Computer Engineering. A Bachelor's degree with relevant experience may also be considered.
  • Post-degree work experience.

Desirable Skills and Experience:

  • Experience in block-level RTL design and verification for complex ASIC or FPGA projects, with a preference for SystemVerilog.
  • Strong understanding of digital design, including areas such as CPU, GPU, cache concepts, memory, and I/O. Familiarity with Arm AMBA specifications or other bus protocols is a plus.
  • Exposure to all stages of the design cycle, from initial concept and specification to implementation, testing, documentation, release, and support.
  • Experience in designing for synthesis to meet specific power, frequency, and area targets, with the ability to make informed trade-offs between functionality, performance, and physical implementation.
  • Hands-on experience with formal verification techniques for rapid IP bring-up.
  • Proficiency in scripting languages such as Bash, Python, etc.
  • Willingness to travel occasionally for training and customer meetings.
  • Strong proficiency in both written and spoken English.

With offices around the world, we are a diverse community of dedicated and innovative engineers. By enabling an inclusive, meritocratic, and open workplace where all our people can grow and succeed, we support our people to share their unique contributions to our success in the global marketplace.

The System IP team has a track record of numerous successful deliveries. We have an open and relaxed culture where best-in-class, creative engineers work together on significant projects. Our upbeat and collaborative team builds System IP components used in future infrastructure, client, embedded, and IoT devices.

At our Budapest-based design center, you will join a hardworking team. You will contribute to the verification planning, verification implementation, coverage closure, benchmarking, and modeling of high-performance, energy-efficient, and secure IP components.

You will use novel technologies and methodologies to ensure the highest quality products as you collaborate with other engineering teams to build complete IP solutions to address the performance, power, and cost requirements for almost all application markets. Join us and let's invent the future together

,[Own and develop System IP microarchitecture specification and design, Handle SystemVerilog RTL logic design and debug; formal bring-up, Work closely with engineers across performance modelling, validation, and implementation to meet all functional requirements, performance, power and area goals] Requirements: RTL Design, ASIC firmware, FPGA, FPGA-Design, SystemVerilog Additionally: részvényekből álló juttatás, Private healthcare, Flat structure, International projects.

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